Electronics Engineers, Except Computer

Wissenschaftliches Rechnen

Abotclaw Progress Critic

Use a deployed VLAC-style vision-language-action critic service to evaluate task progress, compare current observations against a reference image, and judge task completion from robot camera frames. Use when the agent needs external progress supervision, completion verification, failure detection, or image-based task-state comparison for Piper, Unitree G1, or Unitree Go2.

amap-cvlab59

Technische Dokumentation

Robolab Taskgen

Generate RoboLab task files from natural language descriptions of robot manipulation goals. Use this skill when a user wants to create, write, or generate a new task definition, or asks how to define success conditions, terminations, subtasks, or instructions for a robot manipulation task.

NVlabs54

Sampling and the Nyquist Criterion

Foundations of digital signal processing — sampling, aliasing, the Nyquist criterion, quantization, convolution, the discrete Fourier transform, FFT, FIR and IIR filter design, windowing, spectral leakage, and practical issues in fixed-point versus floating-point implementation. Use when designing filters, analyzing spectra, choosing sample rates, reasoning about aliasing, or implementing DSP algorithms on a microcontroller, DSP chip, or host CPU.

Tibsfox51

Wissenschaftliches Rechnen

What a Semiconductor Is

Physical principles underlying diodes, bipolar junction transistors, and MOSFETs — carrier concentrations, drift and diffusion, the pn junction, forward and reverse bias, the Shockley diode equation, BJT operating regions, MOSFET threshold and saturation, small-signal models, and temperature effects. Use when reasoning about device-level behavior, designing bias networks, selecting transistor operating points, interpreting datasheets, or diagnosing nonlinear device failures.

Tibsfox51

Laborwerkzeuge

Boolean Algebra

Design and analysis of combinational and sequential digital circuits using Boolean algebra, truth tables, K-maps, CMOS gate implementation, flip-flops, registers, counters, and finite state machines. Covers De Morgan's theorems, canonical sum-of-products and product-of-sums forms, minimization techniques, propagation delay, setup and hold times, metastability, synchronous design discipline, and FSM encoding. Use when designing, minimizing, verifying, or debugging any circuit whose signals take only discrete logic values.

Tibsfox51

Data Engineering

Ironcore

State machines, ISRs, RTOS, hardware abstraction, and timing analysis — domain expertise for electrical and embedded systems engineers

GadaaLabs47

Systemadministration

Hardware

Read and control I2C and SPI peripherals on Sipeed boards (LicheeRV Nano, MaixCAM, NanoKVM).

nicolasramos46

Isac Engineer

Expert-level ISAC (Integrated Sensing and Communication) Engineer specializing in dual-function radar-communication waveform design, MIMO-OFDM radar signal processing, MUSIC/ESPRIT direction estimation, beamforming optimization under SINR vs SCNR trade-off,... Use when: isac, dfrc, ofdm-radar, mimo-radar, beamforming-optimization.

Framework-Interna

Chip Design Engineer

Expert-level Chip Design Engineer with deep knowledge of RTL design in Verilog/SystemVerilog, logic synthesis, place and route, timing closure, DFT, tapeout sign-off, and advanced process nodes (5nm/3nm). Expert-level Chip Design Engineer with deep knowledge... Use when: chip-...

Bioinformatik

6g Communication Researcher

Expert-level 6G Communication Researcher specializing in sub-THz channel modeling, holographic MIMO, reconfigurable intelligent surfaces (RIS), AI-native air interface design, and semantic communications. Expert-level 6G Communication Researcher specializing... Use when: 6g, thz-communication, holographic-mimo, ris-beamforming, semantic-communications.

Verizon Network Engineer

Design, deploy, and maintain carrier-grade 5G/4G/LTE networks with 99.999% reliability, network security, and customer-first operational excellence at Verizon scale. Use when: verizon, 5g, network-engineering, telecom, carrier-grade.

Machine Learning

Ntn Engineer

A world-class NTN (Non-Terrestrial Network) engineer specializing in 3GPP 5G-NR NTN integration (Rel-17/18), satellite-ground network fusion, LEO/MEO/GEO/HAPS link design, propagation impairment Use when: NTN, 5G-NR, satellite, LEO, GEO.

Huawei Engineer

Senior Huawei telecommunications engineer mindset covering 5G/5.5G infrastructure, wolf culture methodology, pressure-breakthrough engineering, and customer-centric execution. Triggers: Huawei, 5G deployment, telecom infrastructure,狼性文化,压强原则, US sanctions response.

Framework-Interna

Pcb Hardware Engineer

Expert-level PCB Hardware Engineer with deep knowledge of high-speed PCB design, signal integrity, power integrity, EMI/EMC compliance, DFM, and manufacturing output (Gerber, assembly drawings). Expert-level PCB Hardware Engineer with deep knowledge of... Use when: pcb-design,...

Framework-Interna

Quantum Communication Engineer

Expert-level Quantum Communication Engineer specializing in QKD protocol design (BB84, E91, MDI-QKD, TF-QKD), quantum repeater architectures, entanglement distribution, and quantum network engineering. Expert-level Quantum Communication Engineer specializing... Use when: qkd, bb84, tf-qkd, quantum-repeater, entanglement-distribution.

V2x System Engineer

Expert-level V2X System Engineer specializing in DSRC (IEEE 802. Expert-level V2X System Engineer specializing in DSRC (IEEE 802.11p/WAVE) and C-V2X (LTE-V2X/ NR-V2X) communication stack design, SAE J2735/J2945 message set implementation, ETSI ITS standards,... Use when: v2x,...

Machine Learning

Nxp

Expert skill for NXP Semiconductors Skill

Bioinformatik

Wide Bandgap Semiconductor Engineer

Expert-level Wide Bandgap Semiconductor Engineer with deep knowledge of SiC, GaN, Ga2O3, power device design, epitaxial growth, device fabrication, characterization, EV applications, and AEC-Q101 qualification. Transforms AI into a senior power device engineer. Use when: wide-...

Projektmanagement

Openclaw Face Follow

Use when asked to start, stop, or inspect face follow, person tracking, human tracking, or subject tracking for the MomoAgent arm through quick_control_api. Connect the robot session if needed, then call the follow endpoints. Prefer attention mode with idle-scan fallback enabled for demos where the arm should keep moving when no face is visible.

wanhaoniu41

Create Layout

Plan & create a PCB layout.

glowingkitty41

Medien

Dji Camera Capture

Use when asked to take a photo, start video recording, stop video recording, inspect camera devices, or save media into session subfolders on this macOS machine. This skill works with OsmoPocket3 and ordinary macOS cameras such as USB or UVC webcams, using a native AVFoundation helper under skills/dji-camera-capture/workspace/captures.

wanhaoniu41

Systemadministration

Openclaw Idle Scan

Use when asked to start, stop, or inspect idle scan, standby cruise, patrol motion, or smooth random camera motion for the MomoAgent arm through quick_control_api. Connect the robot session if needed, then call the idle-scan endpoints.

wanhaoniu41

Data Engineering

Create Schematic

Plan & create a PCB schematic.

glowingkitty41

Design

Schematic Generator

Generates schematics, netlists, or HDL from requirements for hardware/PCB projects. Validates physical constraints. Use when building PCB, HDL, or hardware designs from approved requirements.

Agile-V36

Simulink Profile Initialization

Profile and analyze the initialization (compile) phase of a Simulink model. Use when the user asks to profile model initialization, diagnose slow model loading/compiling, or analyze existing init profiling data files (out_after.mat, perfTracer.mat, profilerResults.mat, modelCompileDiary.txt).

simulink25

Simulink Solver Profiler Analyzer

Runs the Simulink Solver Profiler and analyzes the results. Run when the user asks to run the Simulink solver profiler and when the user asks for advice on solver issues or performance issues in Simulink.

simulink25

Cloud

Wsl Vivado

Guide on how to invoke Windows Vivado toolchain from WSL environment using wrapper scripts for cross-platform FPGA development and building.

diegosouzapw20