Embedded Dev

• I2C: Check for ACK/NACK, handle clock stretching
• SPI: Configure correct mode (CPOL, CPHA)
• UART: Set correct baud rate, parity, stop bits
• CAN: Use proper message IDs and filtering

Memory-Mapped I/O

• Use volatile pointers for register access
• Define register layouts with bitfields or packed structs
• Document register offsets and bit meanings

RTOS Concepts

• Use semaphores/mutexes for synchronization
• Avoid priority inversion
• Size stacks appropriately
• Use message queues for inter-task communication

FPGA/HDL

• Synchronize signals across clock domains
• Use proper reset strategies
• Document timing constraints
• Simulate before synthesis

Build Systems

• CMake for cross-compilation
• Makefiles with proper dependency tracking
• Linker scripts for memory layout

Debugging

• Use JTAG/SWD for hardware debugging
• Implement logging over UART or RTT
• Use logic analyzers for protocol debugging
• Check for stack overflows

Best Practices

• Document hardware connections and pin assignments
• Version control hardware abstraction layers
• Test on actual hardware, not just simulators
• Consider power consumption and timing constraints